From b2320404202ad3296480bd472a6a79f5e5427de8 Mon Sep 17 00:00:00 2001
From: tomsmeding <tom.smeding@gmail.com>
Date: Sun, 28 Apr 2019 16:49:32 +0200
Subject: Preliminary finish of lowering

That is to say, there is no register allocation yet, but I think the
currently generated code can be regalloc'd without much trouble.
---
 Intermediate.hs | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'Intermediate.hs')

diff --git a/Intermediate.hs b/Intermediate.hs
index 2729493..8c4a5dc 100644
--- a/Intermediate.hs
+++ b/Intermediate.hs
@@ -46,6 +46,8 @@ data InsCode
     | IDiscard Ref
     -- | Do stuff on function entry
     | IFunctionEntry
+    -- | Do stuff on application entry
+    | IApplicationEntry
   deriving Eq
 
 data Terminator
@@ -98,6 +100,7 @@ instance Show InsCode where
     show (IAllocClo name vs) = "alloc-closure \"" ++ name ++ "\" " ++ show vs
     show (IDiscard r) = "discard " ++ show r
     show IFunctionEntry = "function-entry"
+    show IApplicationEntry = "application-entry"
 
 instance Show Terminator where
     show (IBr r b1 b2) = "br " ++ show r ++ " " ++ show b1 ++ " " ++ show b2
-- 
cgit v1.2.3-54-g00ecf