From b2320404202ad3296480bd472a6a79f5e5427de8 Mon Sep 17 00:00:00 2001 From: tomsmeding Date: Sun, 28 Apr 2019 16:49:32 +0200 Subject: Preliminary finish of lowering That is to say, there is no register allocation yet, but I think the currently generated code can be regalloc'd without much trouble. --- VM.hs | 1 + 1 file changed, 1 insertion(+) (limited to 'VM.hs') diff --git a/VM.hs b/VM.hs index dfa4c74..33251fe 100644 --- a/VM.hs +++ b/VM.hs @@ -78,6 +78,7 @@ vmRunInstr info@(Info bbmap gfds datas) state@(State tmap (args, closure)) (dest IAllocClo name clrefs -> return (assignRef state dest (RVClosure name (map (findRef tmap) clrefs))) IDiscard _ -> return state IFunctionEntry -> return state + IApplicationEntry -> return state vmRunTerm :: Info -> State -> Terminator -> IO (RunValue, State) vmRunTerm info@(Info bbmap _ _) state@(State tmap _) term = case term of -- cgit v1.2.3-54-g00ecf