Preliminary finish of lowering

That is to say, there is no register allocation yet, but I think the
currently generated code can be regalloc'd without much trouble.

1 files changed, 1 insertions, 0 deletions

diff --git a/VM.hs b/VM.hs
index dfa4c74..33251fe 100644
--- a/VM.hs
+++ b/VM.hs
@@ -78,6 +78,7 @@ vmRunInstr info@(Info bbmap gfds datas) state@(State tmap (args, closure)) (dest
     IAllocClo name clrefs -> return (assignRef state dest (RVClosure name (map (findRef tmap) clrefs)))
     IDiscard _ -> return state
     IFunctionEntry -> return state
+    IApplicationEntry -> return state
 
 vmRunTerm :: Info -> State -> Terminator -> IO (RunValue, State)
 vmRunTerm info@(Info bbmap _ _) state@(State tmap _) term = case term of